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SpaceX // design, manufacture & launch of advanced rockets & spacecraft
 
Engineering, Full Time    Irvine, CA, United States    Posted: Saturday, April 10, 2021
 
   
 
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JOB DETAILS
 

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

SR. FPGA/ASIC DESIGN ENGINEER (STARLINK)

Would you like to become part of team developing silicon for Starlink's low earth orbit satellites that deliver broadband connectivity to the people who either do not have access to internet or have spotty connectivity? Come join the team working on silicon projects that are driving more integration, lower power, mixed signal architectures & next generation silicon technology for deployment in space & ground infrastructures.

RESPONSIBILITIES:

  • Design digital ASIC and/or FPGAs for Starlink satellites, implementing complex SoC blocks & SoC integration tasks
  • Participate in the design process starting with high-level conceptual & architectural discussions & ending with micro architecture & design partition within the ASIC/FPGA
  • Implement design blocks using Verilog/System Verilog
  • Participate in all phases of ASIC/FPGA design flow (e.g. synthesis, timing closure)
  • Work with backend teams to address any layout & timing issues for ASICs
  • Bring-up & validate ASICs & FPGAs in the lab

BASIC QUALIFICATIONS:

  • Bachelors degree in electrical engineering, computer engineering or computer science
  • 5+ years of experience working with FPGAs and/or ASICs

PREFERRED SKILLS AND EXPERIENCE:

  • Ability to solve complex problems including clock domain crossings & power optimization
  • Experience with latest simulation & verification methodologies
  • Understanding of data path pipelines, state machines & arithmetic operations
  • Exposure to advanced timing closure techniques
  • Experience in Verilog, System Verilog and/or VHDL
  • ASIC/FPGA/SoC system integration experience
  • Experience with high reliability design & implementations
  • Software design & development skills
  • Excellent scripting skills (csh/bash, Perl, Python etc.)
  • Experience with EDA tools such as HDL simulators (e.g. VCS, Questa, IES), HDL Lint tools (e.g. Spyglass), FPGA tools (e.g. Xilinx Vivado, Altera Quartus II)
  • Ability to work in a dynamic environment with changing needs & requirements
  • Team-player, can-do attitude & ability to work well in a group environment while still contributing on an individual basis
  • Enjoys being challenged & learning new skills

ADDITIONAL REQUIREMENTS:

  • Must be willing to travel when needed (typically <10%)
  • Willing to work extended hours & weekends as needed

ITAR REQUIREMENTS:

  • To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.  

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence & qualifications & will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceXs Affirmative Action Plan for veterans & individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department at (310) 363-6000.

 
 
 
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