SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
FPGA/ASIC VERIFICATION ENGINEER (STARLINK)
We are looking for a Verification Engineer to help us verify the next generation silicon for our Starlink satellite products. The work will include block & system level pre-silicon verification projects using state-of-the-art tools & methodologies. The ideal candidate will be a hands-on self-starter who can execute the steps required to fully verify a complex digital design.
- Responsible for digital ASIC and/or FPGA verification at block & system level
- Write & review test plans, develop test harnesses (UVM, System Verilog based) & test sequences
- Responsible for test plan execution, running regressions, code & functional coverage closure
- Contribute towards pre-silicon verification, chip bring-up & post-silicon validation
- Lead multiple projects & mentor junior engineers
- Hands-on self-starter who can execute the steps required to fully verify a complex digital design
- Bachelors degree in electrical engineering or computer engineering
- 1+ years of experience in ASIC/FPGA design verification using System Verilog and/or C++
PREFERRED SKILLS AND EXPERIENCE:
- Masters degree in electrical engineering or computer engineering
- Experience with verification methodologies such as UVM/OVM/VMM
- Strong object-oriented programming knowledge
- Constrained random verification experience
- Expertise in developing testplans, defining/implementing coverage models, & analyzing results
- Experience creating scalable verification environments
- Ability to write scripts (bash/csh, Python, Perl, TCL, etc.) & test automations
- Exposure with industry standard verification tools: simulators (Questa, VCS, IES), code coverage tools, debug tools (Verdi, Visualizer), bug tracking tools etc.
- Experience with dynamic simulation and/or formal based verification methodologies
- Any RTL design, chip bring-up, post-silicon validation experience
- Exposure to packet based protocols (PCIe, Ethernet), or wireless protocols (LTE, Wi-Fi), or DSP algorithms
- Familiarity with testing complex designs, code & functional coverage, & assertions
- Ability to work in a dynamic environment with changing needs & requirements
- Must be willing to travel, when needed (typically <10%)
- This role may be based in Irvine, CA or Redmond, WA
- To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence & qualifications & will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceXs Affirmative Action Plan for veterans & individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department at (310) 363-6000.