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With John Hennessy (Chairman, Alphabet), Lip-Bu Tan (CEO, Cadence Design), Naveen Rao (GM AI, Intel), Kai Yu (Founder, Horizon Robotics), Yvonne Lutsch (Bosch Ventures), Eric Baissus (CEO, Kalray), Emily Watkins (AI Solns Architect, Pure Storage), Justin Butler (Partner, Eclipse Ventures), Rashmi Gopinath (Partner, M12).
Tuesday, September 17, 2019 at 08:00 AM   $1899
Computer History Musuem, 1401 N Shoreline Blvd
 
     
 
 
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EVENT DETAILS
AIMS OF THE 2019 SUMMIT
The inaugural AI Hardware Summit sold out in 2018 & is the premier premier event for the AI chip ecosystem.

The 3 core aims of the Summit are:

To assemble the critical mass of the global industry to promote innovation & adoption of silicon & systems for processing deep learning, neural networks & computer vision.To serve as the venue where the technology roadmap of emerging AI hardware is analyzed & updated each year.To connect silicon & systems vendors & hardware innovators to customers, partners, ML researchers & investors.

WHY ATTEND
Take advantage of over 9 hours of dedicated networking time to meet key industry leaders, whilst also exploring:

Luminary Keynotes: Unique perspectives from industry luminaries in hardware (John Hennessy), AI (TBC) & investment (Lip-Bu Tan).
Innovations & Optimizations of Silicon & Systems for AI Training & Inference: Presentations & product launches from C-level executives from AI chip start ups, semiconductor companies & systems OEMs.
Training & Inference at Hyperscale & AI Accelerators in the Data Center Hardware Environment: Deployment & maintenance of AI infrastructure in data centers, hardware requirements for training & inference at scale.
Inference in Client (Edge) Computing: Applications for AI accelerators in cameras, consumer electronics, autonomous vehicles etc.
Beyond Compute: AI's Impact on Memory, Storage & Networking: Innovations in HBM, on-chip memory & NVM, I/O bottlenecks, data transfer & high-speed interconnects.
The Impact of Future ML Models on Hardware Design: Machine Learning co-design, robustness & reprogrammability, model standardization & interoperability.
AI Chip Design & Commercialization: Design, testing & manufacturing, form factors & routes-to-market.
Financial & Industrial Analysis: Market growth & maturity, VC investment trends & dynamics, the commoditization of the inference market, benchmarking & metrics.
Two overarching efforts are indispensable in this AI chip development frenzy: objectively evaluating & comparing different chips (benchmarking), & reliably projecting the growth paths of AI chips (road mapping).

White Paper on AI Chip Technologies: Tsing Hua University & Beijing Innovation Center for Future Chips, December 2018.

WHAT'S DIFFERENT TO 2018?
4 hours extra networking time.
Improved representation from AI hardware value chain.
Whole second floor of Computer History Museum.
All presentations to be made available to registered attendees on day 1 of the conference.
15+ extra speakers.
10+ extra partners.
Deep dive workshop sessions.
Improved on-site experience (branding, catering, networking).
 
 
 
 
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